Full Adder: Adding with Carry-In -

A Full Adder is a digital circuit that performs the addition of two single-bit binary numbers, and also considers a carry-in bit from a previous stage. It produces two outputs: the sum of the two bits plus the carry-in, and a carry-out bit, which indicates if there is an overflow to the next higher bit. This is essential for adding multi-bit numbers.

Block Diagram:

Your Roadmap

1 Block Diagram:
2 Truth Table:
3 Verilog Code:
4 Test Bench Code:

<span class="selected">         Cin
          |
      A  ----|         |---- Sum
             |  FA     |
      B  ----|         |---- Carry
</span><br class="ProseMirror-trailingBreak" />

Where:

A and B are the input bits.
Cin is the carry-in bit from the previous stage.
FA represents the Full Adder circuit.
Sum is the sum of A, B, and Cin.
Carry is the carry-out bit.

Truth Table:

Cin	A	B	Sum	Carry
0	0	0	0	0
0	0	1	1	0
0	1	0	1	0
0	1	1	0	1
1	0	0	1	0
1	0	1	0	1
1	1	0	0	1
1	1	1	1	1

Verilog Code:

<span class="selected">module full_adder(input A, input B, input Cin, output Sum, output Carry);
  assign Sum = A ^ B ^ Cin;
  assign Carry = (A & B) | (Cin & (A ^ B));
endmodule
</span><br class="ProseMirror-trailingBreak" />

Test Bench Code:

<span class="selected">module full_adder_tb;
  reg A, B, Cin;
  wire Sum, Carry;

  full_adder fa_test(
    .A(A),
    .B(B),
    .Cin(Cin),
    .Sum(Sum),
    .Carry(Carry)
  );

  initial begin
    A = 0; B = 0; Cin = 0; #10;
    A = 0; B = 0; Cin = 1; #10;
    A = 0; B = 1; Cin = 0; #10;
    A = 0; B = 1; Cin = 1; #10;
    A = 1; B = 0; Cin = 0; #10;
    A = 1; B = 0; Cin = 1; #10;
    A = 1; B = 1; Cin = 0; #10;
    A = 1; B = 1; Cin = 1; #10;
    $finish;
  end

  initial begin
     $monitor("A=%b, B=%b, Cin=%b, Sum=%b, Carry=%b", A, B, Cin, Sum, Carry);
  end

endmodule
</span>